1. The Field of the Invention
The present invention relates to semiconductor device packages. More particularly, the present invention relates to inner-digitized bond fingers on bus bars of lead frames in semiconductor device packages.
2. The Relevant Technology
The advancement of microprocessing technology has resulted in decreases in the physical dimensions of semiconductor devices such as integrated circuit dies or chips. Such dimensional decreases requires corresponding decreases in the dimensions of semiconductor device packages, including a reduction in the size of lead frames and leads used in such packages.
In many semiconductor devices, a lead called a "bus bar" is used to distribute operating voltages to several contact areas on the semiconductor device, and to provide a ground bus to individual contact areas. For example, a bus bar can serve as an inner lead for providing a power supply voltage (Vcc) and a reference voltage (Vss) or a ground to the semiconductor chip. The bus bar can be connected to any point on the chip by short distance wire bonding to supply a voltage. This allows the bus bar to be effectively employed to reduce noise and increase processing speed.
Semiconductor device packages having a lead-on-chip structure have been developed to meet the demand that packaging for chips be smaller and thinner. A bus bar is used in a lead-on-chip structure to accommodate a number of wires in a limited space, and the bus bar is positioned on the chip.
A packaged semiconductor device is disclosed in U.S. Pat. No. 5,229,329 to Chai et al., in which a lead-on-chip lead frame having a first array and a second array of opposing lead fingers is utilized in the device. A pair of power supply bus bars lies between the opposing lead fingers, with an insulator covering the face of the bus bars.
In another lead-on-chip semiconductor device disclosed in U.S. Pat. No. 5,532,189 to Kiyono, recessed bus bar regions are provided in an elongated bus bar to accommodate location of bonding wires which couple the chip pads and associated inner leads. Fillets are formed of insulative adhesive material up about the bus bar region sides to thereby engage the bonding wires to prevent contact between the wires and the bus bar.
In conventional lead-on-chip semiconductor device packages with a bus bar, the bonding wires attached to leads and the chip are required to jump over the bus bar, resulting in a relatively higher wire loop and longer wire. Adjacent bonding wires attached to the bus bar and the chip have a relatively shorter wire loop height and length. Thus, the respective bonding wires attached to the bus bars and to the leads have different loop heights and lengths, resulting in more complexity in manufacturing the device.
In U.S. Pat. No. 5,592,020 to Nakao et al., a conventional semiconductor device package (not lead-on-chip) is disclosed in which a chip is mounted on a bed of a lead frame, and leads such as a pair of bus bars have alternating offset projections off the chip. In one embodiment, an elongated portion of one of the bus bars, excluding the projections on the bus bar, is pushed downward away from bonding wires attached to the chip. While the alternating offset projections on the bus bars provide for more uniformity in wire length in this conventional package, the wire lengths are still relatively longer, since the bus bars have to be spread out off the chip to form the offset projections, thereby reducing the speed of the chip.
Accordingly, there is a need for improved bus bar structures that overcome or avoid the above problems in semiconductor devices.